	.file	"motor6.c"
__SREG__ = 0x3f
__SP_H__ = 0x3e
__SP_L__ = 0x3d
__CCP__  = 0x34
__tmp_reg__ = 0
__zero_reg__ = 1
	.global __do_copy_data
	.global __do_clear_bss
 ;  GNU C (WinAVR 20081205) version 4.3.2 (avr)
 ; 	compiled by GNU C version 3.4.5 (mingw-vista special r3), GMP version 4.2.3, MPFR version 2.3.2.
 ;  GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
 ;  options passed:  -fpreprocessed motor6.i -mmcu=attiny24 -Os -fno-inline
 ;  -fverbose-asm
 ;  options enabled:  -falign-loops -fargument-alias -fauto-inc-dec
 ;  -fbranch-count-reg -fcaller-saves -fcommon -fcprop-registers
 ;  -fcrossjumping -fcse-follow-jumps -fdefer-pop -fearly-inlining
 ;  -feliminate-unused-debug-types -fexpensive-optimizations
 ;  -fforward-propagate -ffunction-cse -fgcse -fgcse-lm
 ;  -fguess-branch-probability -fident -fif-conversion -fif-conversion2
 ;  -finline-functions -finline-functions-called-once
 ;  -finline-small-functions -fipa-pure-const -fipa-reference -fivopts
 ;  -fkeep-static-consts -fleading-underscore -fmath-errno
 ;  -fmerge-constants -fmerge-debug-strings -fmove-loop-invariants
 ;  -fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls
 ;  -fpeephole -fpeephole2 -freg-struct-return -fregmove
 ;  -freorder-functions -frerun-cse-after-loop -fsched-interblock
 ;  -fsched-spec -fsched-stalled-insns-dep -fsigned-zeros
 ;  -fsplit-ivs-in-unroller -fsplit-wide-types -fstrict-aliasing
 ;  -fstrict-overflow -fthread-jumps -ftoplevel-reorder -ftrapping-math
 ;  -ftree-ccp -ftree-copy-prop -ftree-copyrename -ftree-dce
 ;  -ftree-dominator-opts -ftree-dse -ftree-fre -ftree-loop-im
 ;  -ftree-loop-ivcanon -ftree-loop-optimize -ftree-parallelize-loops=
 ;  -ftree-reassoc -ftree-salias -ftree-scev-cprop -ftree-sink -ftree-sra
 ;  -ftree-store-ccp -ftree-ter -ftree-vect-loop-version -ftree-vrp
 ;  -funit-at-a-time -fverbose-asm -fzero-initialized-in-bss

 ;  Compiler executable checksum: 67867e0bb6a39ca5af7615e31f09b8c9

	.text
.global	main
	.type	main, @function
main:
/* prologue: function */
/* frame size = 0 */
	ldi r24,lo8(-128)	 ;  tmp52,
	out 70-32,r24	 ; ,, tmp52
	out 70-32,__zero_reg__	 ; ,,
	ldi r24,lo8(1)	 ;  tmp55,
	out 78-32,r24	 ; ,, tmp55
	ldi r24,lo8(6)	 ;  tmp57,
	out 39-32,r24	 ; ,, tmp57
	sbi 33-32,6	 ; ,,
	ldi r24,lo8(-17)	 ;  tmp61,
	out 38-32,r24	 ; ,, tmp61
	ldi r24,lo8(16)	 ;  tmp63,
	out 35-32,r24	 ; ,, tmp63
	ldi r24,lo8(63)	 ;  tmp65,
	out 58-32,r24	 ; ,, tmp65
	ldi r24,lo8(21)	 ;  tmp67,
	out 59-32,r24	 ; ,, tmp67
/* #APP */
 ;  60 "motor6.c" 1
	sei
 ;  0 "" 2
/* #NOAPP */
.L3:
/* #APP */
 ;  67 "motor6.c" 1
	cli
 ;  0 "" 2
/* #NOAPP */
	lds r30,Step	 ;  Step.0, Step
	ldi r31,lo8(0)	 ;  Step.0,
	subi r30,lo8(-(NextStep))	 ;  Step.0,
	sbci r31,hi8(-(NextStep))	 ;  Step.0,
	ld r24,Z	 ;  Step.1, NextStep
	sts Step,r24	 ;  Step, Step.1
	lds r30,Step	 ;  tempStep, Step
	ldi r31,lo8(0)	 ;  tempStep,
	subi r30,lo8(-(PWR_ON))	 ;  tempStep,
	sbci r31,hi8(-(PWR_ON))	 ;  tempStep,
	ld r24,Z	 ;  D.1348, PWR_ON
	out 59-32,r24	 ; ,, D.1348
/* #APP */
 ;  71 "motor6.c" 1
	sei
 ;  0 "" 2
/* #NOAPP */
	out (76)+1-32,__zero_reg__	 ; ,,
	out 76-32,__zero_reg__	 ; ,,
	lds r24,aread	 ;  aread.2, aread
	mov r18,r24	 ;  temp, aread.2
	ldi r19,lo8(0)	 ;  temp,
	lsr r19	 ;  temp
	mov r19,r18	 ;  temp
	clr r18	 ;  temp
	ror r19	 ;  temp
	ror r18	 ;  temp
.L2:
	in r24,76-32	 ;  D.1353,,
	in r25,(76)+1-32	 ;  D.1353,,
	cp r24,r18	 ;  D.1353, temp
	cpc r25,r19	 ;  D.1353, temp
	brlo .L2	 ; ,
	rjmp .L3	 ; 
	.size	main, .-main
.global	__vector_6
	.type	__vector_6, @function
__vector_6:
	push __zero_reg__	 ; 
	push r0	 ; 
	in r0,__SREG__	 ; 
	push r0	 ; 
	clr __zero_reg__	 ; 
/* prologue: Signal */
/* frame size = 0 */
/* epilogue start */
	pop r0	 ; 
	out __SREG__,r0	 ; 
	pop r0	 ; 
	pop __zero_reg__	 ; 
	reti
	.size	__vector_6, .-__vector_6
.global	__vector_2
	.type	__vector_2, @function
__vector_2:
	push __zero_reg__	 ; 
	push r0	 ; 
	in r0,__SREG__	 ; 
	push r0	 ; 
	clr __zero_reg__	 ; 
/* prologue: Signal */
/* frame size = 0 */
/* epilogue start */
	pop r0	 ; 
	out __SREG__,r0	 ; 
	pop r0	 ; 
	pop __zero_reg__	 ; 
	reti
	.size	__vector_2, .-__vector_2
.global	__vector_13
	.type	__vector_13, @function
__vector_13:
	push __zero_reg__	 ; 
	push r0	 ; 
	in r0,__SREG__	 ; 
	push r0	 ; 
	clr __zero_reg__	 ; 
	push r24	 ; 
/* prologue: Signal */
/* frame size = 0 */
	in r24,37-32	 ;  aread.3,,
	sts aread,r24	 ;  aread, aread.3
/* epilogue start */
	pop r24	 ; 
	pop r0	 ; 
	out __SREG__,r0	 ; 
	pop r0	 ; 
	pop __zero_reg__	 ; 
	reti
	.size	__vector_13, .-__vector_13
.global	PWR_ON
	.data
	.type	PWR_ON, @object
	.size	PWR_ON, 6
PWR_ON:
	.byte	36
	.byte	33
	.byte	9
	.byte	24
	.byte	18
	.byte	6
.global	PWR_BREAK
	.type	PWR_BREAK, @object
	.size	PWR_BREAK, 6
PWR_BREAK:
	.byte	20
	.byte	17
	.byte	5
	.byte	20
	.byte	17
	.byte	5
.global	PWR_OFF
	.type	PWR_OFF, @object
	.size	PWR_OFF, 6
PWR_OFF:
	.byte	4
	.byte	1
	.byte	1
	.byte	16
	.byte	16
	.byte	4
.global	NextStep
	.type	NextStep, @object
	.size	NextStep, 6
NextStep:
	.byte	1
	.byte	2
	.byte	3
	.byte	4
	.byte	5
	.byte	0
.global	DigitRead
	.type	DigitRead, @object
	.size	DigitRead, 6
DigitRead:
	.byte	4
	.byte	2
	.byte	1
	.byte	4
	.byte	2
	.byte	1
.global	DigitReadBaseVal
	.type	DigitReadBaseVal, @object
	.size	DigitReadBaseVal, 6
DigitReadBaseVal:
	.byte	4
	.byte	0
	.byte	1
	.byte	0
	.byte	2
	.byte	0
.global	Step
.global	Step
	.section .bss
	.type	Step, @object
	.size	Step, 1
Step:
	.skip 1,0
.global	PowerState
.global	PowerState
	.type	PowerState, @object
	.size	PowerState, 1
PowerState:
	.skip 1,0
.global	Status
.global	Status
	.type	Status, @object
	.size	Status, 1
Status:
	.skip 1,0
.global	noskip
	.data
	.type	noskip, @object
	.size	noskip, 1
noskip:
	.byte	1
.global	Power
.global	Power
	.section .bss
	.type	Power, @object
	.size	Power, 2
Power:
	.skip 2,0
.global	NextPower
.global	NextPower
	.type	NextPower, @object
	.size	NextPower, 2
NextPower:
	.skip 2,0
	.comm aread,1,1
	.comm rpm,2,1
